-intstyle "ise" -incremental -lib "unisims_ver" -lib "unimacro_ver" -lib "xilinxcorelib_ver" -lib "secureip" -o "D:/_FPGA/ARC_2020/Lab4_Cache/sword4-test-bench/sim_mips_isim_beh.exe" -prj "D:/_FPGA/ARC_2020/Lab4_Cache/sword4-test-bench/sim_mips_beh.prj" "work.sim_mips" "work.glbl" 
